A Master  Thesis in Electrical Engineering  Dept. Has Been Discussed 

A master thesis has been discussed  in Electrical Engineering  Dept. at U.O.T. entitled : (Power Consumption Optimization of FPGA Realization for Computation Algorithms) 

The work presented by MSc. Student/  Fadhil  Thaer Nasser focused on five computational algorithms: the Arithmetic Logic Unit (ALU) algorithm, the multiplication algorithm, the division algorithm, the nearest neighbor algorithm (K-NN), and the vector machine (SVM) algorithm.

These computational algorithms are under restrictions, such as large space usage and high power consumption. Thus, to improve system performance, its design requires the highest speed and low-power computational algorithm. There are two types of power dissipation sources in digital systems design: the 1^ST  source is static power, and 2^ND is dynamic power.

The discussion committee consisted of :-

1-Prof. Dr. Hanan A. Akkar/ Chairman.

2- Asst. Prof. Dr. Uday  A.  Abdul Redha / Member.

3- Asst. Prof. Dr. Moayed S. Karouk/ Member.